All Publications

 

Journal Articles

     
X. Ding and E. C. Larson, “Incorporating Uncertainties in Student Response Modeling by Loss Function Regularization,” Journal of Neurocomputing, Vol. 409, pp. 74-82, (October 2020).
  X. Ding, Z. Raziei, E. C. Larson, E. Olinick, P. Krueger, and M. Hahsler, “Swapped Face Detection using Deep Learning and Subjective Assessment,” EURASIP Journal on Information Security, (May 2020), doi:10.1186/s13635-020-00109-8.
  S. A. Alhelaly, J. Dworak, K. Nepal, T. W. Manikas, P. Gui, and A. L. Crouch, “3D Ring Oscillator based Test Structures to Detect a Trojan Die in a 3D Die Stack in the Presence of Process Variations,” IEEE Transactions on Emerging Topics in Computing, (April 20200), doi: 10.1109/TETC.2020.2984162.
  Y. Sun, F. Zhang, H. Jiang, K. Nepal, J. Dworak, T. W. Manikas, and R. I. Bahar, “Repurposing FPGAs for Tester Design to Enhance Field-Testing in a 3D Stack,” Journal of Electronic Testing: Theory and Applications (JETTA), (December 2019).
  X. Wang, T. Liu, S. Guo, M. A. Thornton, and P. Gui, “A 2.56 Gb/s Serial Wireline Transceiver that Supports an Auxiliary Channel in 65-nm CMOS,” IEEE Transactions on VLSI, Vol. 28, Issue 1, pp. 12–22, (January 2020), (ieeexplore pre-print access, August 12, 2019), doi:10.1109/TVLSI.2019.2931478.
  K. N. Smith and M. A. Thornton, “Higher Dimension Quantum Entanglement Generators,” ACM Journal on Emerging Technologies in Computing Systems, Vol. 16, No. 1, Article 3, 21 pages, (October 2019).
  J. M. Medellin and M. A. Thornton, “Consideration of Quality Attribute Tradeoffs of the Blockchain Pattern in the Software Development Process,” Annals of Emerging Technologies in Computing, Vol. 3, No. 4, pp. 15–27, (October 2019).
 

T. Giallanza, T. Siems, E. Sharp, E. Gabrielsen, I. Johnson, M. A. Thornton, and E. C. Larson, “Keyboard Snooping from Mobile Phone Arrays with Mixed Convolutional and Recurrent Neural Networks,” Proc. of the ACM on Interactive, Mobile, Wearable and Ubiquitous Technologies, Vol. 3, No. 2, pp. 45-1 - 45-22, (June 2019).

  K. N. Smith, T. P. LaFave Jr., D. L. MacFarlane, and M. A. Thornton, “Higher-Radix Chrestenson Gates for Photonic Quantum Computation,” Journal of Applied Logics, Vol. 5, Issue 9, pp. 1781-1798, (December 2018). 
  X. Ding, D. Nassehi, and E. C. Larson, “Measuring Oxygen Saturation using Convolutional Neural Networks on Smartphones,” IEEE Journal of Biomedical and Health Informatics, Vol. 23, No. 6, pp. 2603-2610, (November 2018).
  C. Wang, X. Ding, and E. C. Larson. “PupilNet, Measuring Task Evoked Pupillary Response using Commodity RGB Tablet Cameras: Comparison to Mobile, Infrared Gaze Trackers for Inferring Cognitive Load,” Journal of Interactive, Wearable, and Ubiquitous Technology (IMWUT), (December 2017).
  S. D. Gupta and M. A. Thornton, “A Fixed-Point Squaring Algorithm Using an Implicit Radix Number System,” IEEE Journal on Emerging and Selected Topics in Circuits and Systems, Vol. 6, Issue 1, pp. 34-43, (March 2016), (pre-published February 2016, IEEEXplore).
  P. Niemann, R. Wille, D. M. Miller, M. A. Thornton, and R. Drechsler, “QMDDs: Efficient Quantum Function Representation and Manipulation,” IEEE Transactions on Computer-Aided Design, Vol. 35, No. 1, pp. 86-99, (January 2016), (pre-published July 21, 2015, IEEEXplore.ieee.org pre-publication version).
  M. A. Thornton, “Simulation and Implication Using a Transfer Function Model for Switching Logic,” IEEE Transactions on Computers, Vol. 64, No. 12, pp. 3580-3590, (December 2015), (pre-published February 6, 2015, IEEEXplore.ieee.org pre-publication version).
  K. Nepal, S. Alhelaly, J. Dworak, R. I. Bahar, T. W. Manikas, and P. Gui, “Repairing a 3D Die-Stack Using Available Programmable Logic,” IEEE Trans. Computer-Aided Design of Integrated Circuits, Vol. 34, No. 5, pp. 849-861, (May 2015).
  D. Y. Feinstein and M. A. Thornton, “Quantum Multiple-Valued Decision Diagrams Containing Skipped Variables,” Journal of Multiple-Valued Logic and Soft Computing, Vol. 24, No. 1-4, pp. 93-108, (2015).
  T. W. Manikas, M. A. Thornton, and D. Y. Feinstein, “Modeling System Threat Probabilities Using Mixed-Radix Multiple-Valued Logic Decision Diagrams,” Journal of Multiple-Valued Logic and Soft Computing, Vol. 24, No. 1-4, pp. 135-149, (2015) (invited paper).
  S. Nagayama, T. Sasao, J. Butler, M. Thornton, and T. W. Manikas, “On Optimizations of Edge-Valued MDDs for Fast Analysis of Multi-State Systems,” IEICE Transactions on Information and Systems, Vol. E97-D, No. 9, pp. 2234-2242, (September 2014).
  R. P. Menon and M. A. Thornton, “Clock Distribution Area Reduction Using a Multiple-Valued Clocking Approach,” Journal of Multiple-Valued Logic and Soft Computing, Vol. 22, No. 1-2, pp. 21-39, (2014).
 

P. Laplante, B. Kalinowski, and M. A. Thornton, “A Principles and Practices Exam Specification to Support Software Engineering Licensure in the USA,” Software Quality Professional, Vol. 15, Issue 1, pp. 4-15, (December 2012).

 

M. A. Thornton, “Professional Licensure for Software Engineers: An Update,” IEEE Computing in Science and Engineering, IEEE Computer Society Press and American Institute of Physics, Vol. 14, Issue 5, pp. 86-87, (September-October 2012), (IEEEXplore.ieee.org).

 

D. Y. Feinstein and M. A. Thornton, “Reversible Logic Synthesis Based on Decision Diagram Variable Ordering,” Journal of Multiple-Valued Logic and Soft Computing, Vol. 19, No. 4, pp. 325-339, (2012).

 

D. Easton and M. A. Thornton, “Business Process Development Through the Use of a Modified Axiomatic Design Methodology,” Journal of International Business Management & Research, Vol. 2, Issue 4, (May 2011).

 

T. W. Manikas, L. L. Spenner, P. D. Krier, M. A. Thornton, S. Nair, and S. A. Szygenda, “An Axiomatic Analysis Approach for Large-Scale Disaster-Tolerant Systems Modeling,” Journal of Systematics, Cybernetics and Informatics, Vol. 9, No. 1, pp. 89-93, (2011).

 

S. Barrett and M. A. Thornton, “To PE or not to PE: The Sequel,” IEEE Computing in Science and Engineering, IEEE Computer Society Press and American Institute of Physics, Vol. 12, No. 4, pp. 62-65, (July/August 2010), (IEEEXplore.ieee.org).

 

D. Y. Feinstein, M. A. Thornton, and D.M. Miller, “Minimization of Quantum Multiple-Valued Decision Diagrams Using Data Structure Metrics,” Journal of Multiple-Valued Logic and Soft Computing, Vol. 15, No. 4, pp. 361-377, (2009).

 

W. Chen, M. A. Thornton, and P. Gui, “A Redundant Signed Binary Addition Based Digital-to-Frequency Converter,” IEE Electronics Letters, Vol. 45, Issue 16, pp. 824-826, (July 2009).

 

A. Fit-Florea, L. Li, M. A. Thornton, and D. W. Matula, “A Discrete Logarithm Number System for Integer Arithmetic Modulo 2k: Algorithms and Lookup Structures,” IEEE Transactions on Computers, Vol. 58, No. 2, pp. 163-174, (February 2009), (IEEEXplore.ieee.org version).

 

D. Easton, M. A. Thornton, V.S.S. Nair, and S. A. Szygenda, “A Methodology for Disaster Tolerance Utilizing the Concepts of Axiomatic Design,” IIIS Journal of Systemics, Cybernetics and Informatics, Vol. 6, No. 4, (2008).

 

C. M. Lawler, M. A. Harper, S. A. Szygenda, and M. A. Thornton, “Components of Disaster Tolerant Computing: Analysis of Disaster Recovery, IT Application Downtime & Executive Visibility,” International Journal of Business Information Systems, Vol. 3, No. 3, pp. 317-331, (2008).

 

D. M. Miller, D. Y. Feinstein, and M. A. Thornton, “QMDD Minimization using Sifting for Variable Reordering,” Journal of Multiple-Valued Logic and Soft Computing, Vol. 13, No. 4-6, pp. 537-552, (2007).

 

L. Li, M. A. Thornton, and S. Szygenda, “Integrated Design Validation: Combining Simulation and Formal Verification in Integrated Circuit Design,” IIIS Journal of Systemics, Cybernetics and Informatics, Vol. 4, No. 2, (2006).

 

R. B. Reese, M. A. Thornton, and C. Traver, “A Coarse-Grain Phased Logic CPU,” IEEE Transactions on Computers, Vol. 54, No. 7, pp. 788-799, (July 2005).

 

R. B. Reese, M. A. Thornton, C. Traver, and D. Hemmendinger, “Early Evaluation for Performance Enhancement in Phased Logic,” IEEE Transactions on Computer Aided Design, Vol. 24, No. 4, pp. 532-550, (April 2005).

 

A. Fit-Florea, D.W. Matula, and M. A. Thornton “Additive Bit-serial Algorithm for the Discrete Logarithm Modulo 2k,” IEE Electronics Letters, Vol. 41, Issue 2, pp. 57-59, (January 2005).

 

A. Fit-Florea, D.W. Matula, and M. A. Thornton “Addition-based Exponentiation Modulo 2k,” IEE Electronics Letters, Vol. 41, Issue 2, pp. 56-57, (January 2005).

 

M. A. Thornton and D. M. Miller, “Computation of Discrete Function Chrestenson Spectrum Using Cayley Color Graphs,” Journal of Multiple-Valued Logic and Soft Computing, Vol. 10, No. 2, pp. 189-202, (2004).

 

M. A. Thornton, “Mixed-radix MVL Function Spectral and Decision Diagram Representation,” Automation and Remote Control, Vol. 65, Issue 6, pp. 1007-1017, (June 2004), (invited paper, in English and Russian).

 

R. B. Reese, M. A. Thornton, and C. Traver, “A Two-phase Micropipeline Control Wrapper with Early Evaluation,” IEE Electronics Letters, Vol. 40, Issue 6, pp. 365-366, (March 2004).

 

R. B. Reese, M. A. Thornton, and C. Traver, “A Fast Two-phase Micropipeline Control Wrapper for Standard Cell Implementation,” IEE Electronics Letters, Vol. 40, Issue 4, pp. 227-229, (February 2004).

 

M. A. Thornton, “Performance Evaluation of a Parallel Decoupled Data Driven Multiprocessor,” Parallel Processing Letters, Vol. 13, No. 3, pp. 497-507, (September 2003).

 

M. A. Thornton, “A Signed Binary Addition Circuit Based on an Alternative Class of Addition Tables,” Computers & Electrical Engineering, Vol. 29, No. 2, pp. 303-315 (March 2003).

 

R. Drechsler, M. Kerttu, P. Lindgren, and M. A. Thornton “Low Power Optimization Techniques for BDD Mapped Circuits Using Temporal Correlation,” Canadian Journal of Electrical and Computer Engineering, Vol. 27, No. 4, pp. 159-164, (October 2002), (invited paper).

 

M. A. Thornton, R. Drechsler, and W. Günther, “Logic Circuit Equivalence Checking Using Haar Spectral Coefficients and Partial BDDs,” VLSI Design, Vol. 14, No. 1, pp. 53-64, (February 2002).

 

A. Žužek, R. Drechsler, and M. A. Thornton, “Boolean Function Representation and Spectral Characterization Using AND/OR Graphs,” Integration, the VLSI Journal, Vol. 29, pp. 101-116, (September 2000).

 

M. A. Thornton and V. S. S. Nair, “Behavioral Synthesis of Combinational Logic Using Spectral Based Heuristics,” ACM Transactions on Design Automation of Electronic Systems, Vol. 4, No. 2, pp. 219-230, (April 1999).

 

M. A. Thornton and D. L. Andrews, “Resource Estimation for Parallel Architectures with Distributed Processor/Memory Nodes,” Journal of Computing and Information Technology, Vol. 6, No. 4, pp. 359-371 (December 1998).

 

M. A. Thornton, “Signed Binary Addition Circuitry with Inherent Even Parity Outputs,” IEEE Transactions on Computers, Vol. 46, No. 7, pp. 811-816 (July 1997).

 

M. A. Thornton and V. S. S. Nair, “BDD Based Spectral Approach for Reed-Muller Circuit Realisation,” IEE Proceedings-Computers and Digital Techniques, Vol. 143, Issue 2, pp. 145-150, (March 1996).

 

M. A. Thornton and V. S. S. Nair, “Efficient Calculation of Spectral Coefficients and their Application,” IEEE Transactions on Computer Aided Design, Vol. 14, No. 11., pp. 1328-1341, (November 1995).

 

M. A. Thornton and V. S. S. Nair, “Efficient Spectral Coefficient Calculation Using Circuit Output Probabilities,” Digital Signal Processing: A Review Journal, pp. 245-254, (October 1994). 

Books

       

M. A. Thornton, Modeling Digital Switching Circuits with Linear Algebra, Morgan & Claypool Publishers, San Rafael, California, ISBN 9781627052337 (hardcopy), ISBN 9781627052344 (eBook), (April 2014).

L. Li and M. A. Thornton, Digital System Verification: A Combined Formal Methods and Simulation Framework, Morgan & Claypool Publishers, San Rafael, California, ISBN 9781608451784 (hardcopy), ISBN 9781608451791 (eBook), (February 2010).

D. M. Miller and M. A. Thornton, Multiple-Valued Logic Concepts and Representations, Morgan & Claypool Publishers, San Rafael, California, ISBN 10-1598291904 (hardcopy), 10-1598291912 (eBook), (January 2008).

R. B. Reese and M. A. Thornton, Introduction to Logic Synthesis Using Verilog HDL, Morgan & Claypool Publishers, San Rafael, California, ISBN 10-1598291068 (hardcopy), ISBN 10-1598291076 (eBook), (November 2006.)

M. A. Thornton, R. Drechsler, and D.M. Miller, Spectral Techniques in VLSI CAD, Kluwer Academic Publishers, Boston, Massachusetts, ISBN 0-7923-7433-9, (July 2001).

Book Chapters and Encyclopedia Articles

    

M. A. Thornton, “Keystroke Dynamics,” Article in the Encyclopedia of Cryptography, Security and Privacy, 3rd Edition, S. Jajodia, P. Samarati, and M. Yung, Editors, Springer Nature, pp. 688-691, 2020, (to appear).

 

M. A. Thornton, Further Improvements in the Boolean Domain, Foreward, pp. xix - xxii, Cambridge Scholars Publishing, Cambridge, UK, Bernd Steinbach, Editor, 2018, ISBN 13-978-1-5275-0371-7, 10-1-5275-0371-2, November 15, 2017. 

  M. A. Thornton, “A Vector Space Method for Boolean Networks,” in Problems and New Solutions in the Boolean Domain, Chapter 1, Section 1.1, pp. 3-50, Cambridge Scholars Publishing, Cambridge, UK, Bernd Steinbach, editor, 2015, ISBN 13-978-1-4438-8947-6; 10-1-4438-8947-4, April 28, 2016.
  M. A. Thornton and Micah A. Thornton, “Boolean Function Spectra and Circuit Probabilities,” in Problems and New Solutions in the Boolean Domain, Chapter 4, Section 4.1, pp. 269-286, Cambridge Scholars Publishing, Cambridge, UK, Bernd Steinbach, editor, 2015, ISBN 13-978-1-4438-8947-6; 10-1-4438-8947-4, April 28, 2016.
 

R. Kotamarti, M. A. Thornton, and M.H. Dunham, “Quantum Computing Approach for Alignment-Free Sequence Search and Classification,” in Multidisciplinary Computational Intelligence Techniques: Applications in Business, Engineering, and Medicine, Chapter 17, pp. 279-300, IGI-Global Press, S. Ali, N. Abbadeni and M. Batouche, editors, ISBN 978-1-4666-1830-5 (hardcopy), ISBN 978-1-4666-1831-2 (eBook), May 2012.

 

M. A. Thornton, “Keystroke Dynamics,” Article in the Encyclopedia of Cryptography and Security, 2nd edition, pp. 688-691, Springer Publishers, H. C. A. van Tilborg and S. Jajodia, editors, ISBN 978-1-4419-5905-8, November 2011, (3rd edition, to appear 2020).

Patents

    U.S. Patent 10,878,333 B2, “Systems and Methods for Preservation of Qubits,” December 29, 2020, January 21, 2020 (filing date), M. A. Thornton, D. L. MacFarlane, T. P. LaFave, Jr., W. V. Oxford (inventors).
  World Intellectual Property Organization (WIPO) 2020/197944, “Systems and Methods for Multi-Source True Random Number Generators,” October 1, 2020, March 19, 2020 (filing date), M. A. Thornton, D.L. MacFarlane, W. V. Oxford, Micah A. Thornton (inventors).
  U.S. Provisional Patent, “Dual Rail Quantum Photonic Circuitry,” September 8, 2020 (filing date), M. A. Thornton, D. L. MacFarlane, W. V. Oxford (inventors).
  U.S. Provisional Patent 63/027,056, “Systems and Methods for Controlled Quantum Information Processing Operation with Trans-radix Basis Components,” May 19, 2020 (filing date), M. A. Thornton (inventor).
 

U.S. Patent Application 16/825,449, “Systems and Methods for Multi-Source True Random Number Generators, Including Multi-Source Entropy Extractor Based Quantum Photonic True Random Number Generators,” September 24, 2020, March 20, 2020 (filing date), M. A. Thornton, D. L. MacFarlane, W. V. Oxford, Micah A. Thornton (inventors).

 

U.S. Patent 10,579,936 B2, “Systems and Methods for Preservation of Qubits,” March 3, 2020, April 27, 2018 (filing date), M. A. Thornton, D. L. MacFarlane, T. P. LaFave, Jr., W. V. Oxford (inventors).

  U.S. Patent Application 67/776,238, “Generating Upsampled Signal from Gyroscope Data,” December 6, 2019 (filing date), M. A. Thornton, E. C. Larson, I. Johnson, T. Siems, E. Gabrielsen (inventors).
  World Intellectual Property Organization (WIPO) WO 2018/222311 A2, “Systems and Methods for Quantum Coherence Preservation of Qubits,” December 6, 2018, April 27, 2018 (filing date), W. V. Oxford, M. A. Thornton, D. L. MacFarlane, T. P. LaFave, Jr. (inventors).
 

World Intellectual Property Organization (WIPO) WO 2018/106702 A1, “Systems and Methods for Quantum Coherence Preservation of Qubits,” June 14, 2018, December 5, 2017 (filing date), W. V. Oxford, M. A. Thornton, D. L. MacFarlane, T. P. LaFave, Jr. (inventors).

 

U.S. Provisional Patent 62/613,262, “Systems and Methods for Implementing Photonic Quantum Storage,” January 3, 2018 (filing date), M. A. Thornton, W. V Oxford, D. L. MacFarlane, T. P. LaFave, Jr., J. S. Gable (inventors).

  U.S. Patent Application 15/832,285, “Systems and Methods for Quantum Coherence Preservation of Qubits,” June 7, 2018, December 5, 2017 (filing date), W. V. Oxford, M. A Thornton, D. L. MacFarlane, T. P. LaFave, Jr. (inventors).
 

U.S. Patent Pending 15/812,663, “Detecting Malicious Software Using Sensors,” September 3, 2020, November 14, 2017 (filing date), M. A. Thornton, M. A. Taylor, K. N. Smith (inventors).

  U.S. Patent 9,684,489, “Fixed-Point Digit Serial Squaring Algorithm,” June 20, 2017, August 31, 2012 (filing date), M. A. Thornton, S. Gupta (inventors).
  U.S. Patent 9,329,699, “Method for Subject Classification Using A Pattern Recognition Input Device,” May 3, 2016, October 22, 2011 (filing date), J. D. Allen, J. J. Howard, M. A. Thornton (inventors).
 

U.S. Patent 8,847,625, “Single Clock Distribution Network for Multi-Phase Clock Integrated Circuits,” September 30, 2014, February 16, 2013, (filing date), M. A. Thornton, R. Menon (inventors).

 

U.S. Patent 7,962,537, “Determining a Table Output of a Table Representing a Hierarchical Tree for an Integer Valued Function,” June 14, 2011, June 26, 2007 (filing date), D. W. Matula, M. A. Thornton, A. Fit-Florea, L. Li (inventors).

  U.S. Patent 7,043,710 B2, “Method for Early Evaluation in Micropipeline Processors,” May 9, 2006, February 10, 2004 (filing date), R. B. Reese, M. A. Thornton (inventors).

Conferences

  

K. N. Smith, M. A. Thornton, and D. M. Miller, “Fast Minimization of Polynomial Decomposition using Fixed-polarity Pascal Transforms,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 259-264, November 11, 2020.

   K. N. Smith, D. L. MacFarlane and M. A. Thornton, “A Quantum Photonic TRNG Based on Higher-radix Logic,” IEEE International Symposium on Multiple Valued Logic (ISMVL), pp. 164-169, November 10, 2020.
  X. Ding, Z. Raziei, E. C. Larson, E. Olinick, P. Krueger, and M. Hahsler, “Swapped Face Detection Using Deep Learning and Subjective Assessment,” arXiv preprint arXiv:1909.04217, 2019.
  S. Douglas and E. C. Larson, “Relationships Between Deep Learning and Linear Adaptive Systems,” ICASSP 2019 (invited paper).
  M. A. Thornton, “Introduction to Quantum Computation Reliability,” IEEE International Test Conference (ITC), online proceedings, November 3-5, 2020 (invited, online, video).
  C. A. Harper, L. Lyons, M. A. Thornton, and E. C. Larson, “Enhanced Automatic Modulation Classification using Deep Convolutional Latent Space Pooling,” IEEE Asilomar Conference on Signals, Systems, and Computers (ASILOMAR), paper MO2-1-4 (online), November 1-4, 2020.
 

K. N. Smith and M. A. Thornton, “Entangled State Preparation for Non-Binary Quantum Computing,” IEEE International Conference on Rebooting Computing (ICRC), pp. 71-79, November 6-8, 2019.

 

K. N. Smith and M. A. Thornton, “Fixed Polarity Pascal Transforms with Computer Algebra Applications,” IEEE Pacific Rim Conference on Communications, Computers, and Signal Processing (PacRim), August 21 - 23, 2019.

  K. N. Smith and M. A. Thornton, “Quantum Logic Synthesis with Formal Verification,” IEEE Midwest Symposium on Circuits and Systems (MWSCAS), pp. 73 – 76, August 4-7, 2019.
 

J. Medellin and M. A. Thornton, “A Discussion on Blockchain Software Quality Attribute Design and Tradeoffs,” International Conference on Emerging Topics in Computing (iCETiC), August 19-20, 2019, Springer Nature, LNICST Vol. 285, pp. 19-28, pub. date: July 14, 2019 (best paper award).

 

K. N. Smith and M. A. Thornton, “A Quantum Computational Compiler and Design Tool for Technology-Specific Targets,” ACM/IEEE International Symposium on Computer Architecture (ISCA), pp. 579 – 588, June 22-26, 2019.

 

K. N. Smith, M. Soeken, B. Schmitt, G. De Micheli, and M. A. Thornton, “Using ZDDs in the Mapping of Quantum Circuits,” Quantum Physics and Logic Conference (QPL), pp. 1 – 11, June 10-14, 2019, arXiv:1901.02406.

 

T. W. Manikas and M. A. Thornton, “Model Checking for Security Analysis of Cyber-Physical Systems,” International Conference on Data Intelligence and Security (ICDIS), South Padre Island, TX, June 2019. 

  K. N. Smith and M. A. Thornton, “Entanglement in Higher-Radix Quantum Systems,” IEEE Symposium on Multiple Valued Logic (ISMVL), pp. 114-119, May 21-23, 2019, arXiv:1906.00491.
  T. Giallanza, E. Gabrielsen, M. A. Taylor, E. C. Larson, and M. A. Thornton, “Task Value Calculus: Multi-Objective Tradeoff Analysis using Multiple-valued Decision Diagrams,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 126-131, May 21-23, 2019.
  M. A. Thornton and D. L. MacFarlane, “Quantum Photonic TRNG with Dual Extractor,” International Conference on Networked Systems/Workshop on Quantum Technology and Optimization Problems (NetSys/QTOP), Springer-Verlag LNCS 11413, pp. 171-182, March 18-21, 2019, presentation video.
  J. Medellin and M. A. Thornton, “Performance Characteristics of Two Blockchain Consensus Algorithms in a VMware Hypervisor,” in proc. International Conference on Grid, Cloud, and Cluster Computing (GCC), July 30, 2018.
 

J. Medellin and M. A. Thornton, “Simulating Resource Consumption in Three Blockchain Consensus Algorithms,” in proc. International Conference on Modeling, Simulation and Visualization Methods (MSV), July 30, 2018.

 

X. Wang, T. Liu, S. Guo, M. A. Thornton, and P. Gui, “A 2.56 Gbps Asynchronous Serial Transceiver with Embedded 80 Mbps Secondary Data Transmission Capability in 65nm CMOS,” IEEE Radio Frequency Integrated Circuits Symposium (RFIC), pp. 360-363, June 10-12, 2018.

 

Micah A. Thornton and M. A. Thornton, “Multiple-Valued Random Digit Extraction,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 162-167, May 16-18, 2018.

  K. N. Smith, T. P. LaFave Jr., D. L. MacFarlane, and M. A. Thornton, “A Radix-4 Chrestenson Gate for Optical Quantum Computation,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 260-265, May 16-18, 2018.
  M. A. Taylor, K. N. Smith, and M. A. Thornton, “Sensor-Based Ransomware Detection,” Future Technologies Conference (FTC), pp. 794-801, November 29-30, 2017.
  D. K. Houngninou and M. A. Thornton, “Simulation of Switching Circuits using Transfer Functions,” IEEE Midwest Symposium on Circuits and Systems (MWSCAS), pp. 511-514, August 6-9, 2017.
  S. Alhelaly, J. Dworak, T. W. Manikas, P. Gui, K. Nepal, and A. L. Crouch, “Detecting a Trojan Die in 3D Stacked Integrated Circuits,” 2017 IEEE North Atlantic Test Workshop (NATW), Providence, RI, USA, pp. 1-6, May 2017.
  K. N. Smith, M. A. Taylor, A. A. Carroll, T. W. Manikas, and M. A. Thornton, “Automated Markov-Chain Based Analysis for Large State Spaces,” Annual IEEE International Systems Conference (SysCon), Montreal, QC, Canada, pp. 306-313, April 24-27, 2017.
 

A. Alharbi and M. A. Thornton, “Demographic Group Prediction Based on Smart Device User Recognition Gestures,” IEEE International Conference on Machine Learning and Applications (ICMLA), pp. 100-107, December 18-20, 2016.

 

D. K. Houngninou and M. A. Thornton, “Implementation of Switching Circuit Models as Transfer Functions,” IEEE International Symposium on Circuits and Systems (ISCAS), pp. 2167-2170, May 22-25, 2016.

  P. C. Davis, M. A. Thornton, and T. W. Manikas, “Reliability Block Diagram Extensions for Non-Parametric Probabilistic Analysis,” IEEE International Systems Conference (SysCon), pp. 927-932, April 18-21, 2016.
  A. Alharbi and M. A. Thornton, “Demographic Group Classification of Smart Device Users,” IEEE International Conference on Machine Learning and Applications (ICMLA), pp. 481-486, December 9-11, 2015.
   T. W. Manikas, M. A. Thornton, and S. Nagayama, “An Improved Methodology for System Threat Analysis Using Multiple-Valued Logic and Conditional Probabilities,” Society for Design and Process Science Conference (SDPS), November 1-5, 2015. 
 

K. N. Smith and M. A. Thornton, “A Multiple-Valued Logic Synthesis Tool for Optical Computing Elements,” IEEE Dallas Circuits and Systems Conference (DCAS), pp. 1-4, paper 38-2.3, October 12-13, 2015.

  S. Nagayama, T. Sasao, J. Butler, M. Thornton, and T. W. Manikas, “Edge Reduction for EVMDDs to Speed Up Analysis of Multi-State Systems,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 170-175, May 18-20, 2015.
 

M. Thornton, T. W. Manikas, S. Szygenda, and S. Nagayama, “System Probability Distribution Modeling Using MDDs,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 196-201, May 19-21, 2014.

  S. Nagayama, T. Sasao, J. Butler, M. Thornton, and T. W. Manikas, “Analysis Methods of Multi-State Systems Partially Having Dependent Components Using Multiple-Valued Decision Diagrams,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 190-195, May 19-21, 2014.
  K. Nepal, X. Shen, J. Dworak, T. W. Manikas, and R. I. Bahar, “Built-in Self-Repair in a 3D Die Stack Using Programmable Logic,” IEEE Symposium Defect and Fault Tolerance in VLSI and Nanotechnology Systems, pp. 243-248, October 2013.
  J. Moore, M. A. Thornton, and D. W. Matula, “Low Power Floating-Point Multiplication and Squaring Units with Shared Circuitry,” IEEE Midwest Symposium on Circuits and Systems (MWSCAS), pp. 1395-1398, August 4, 2013.
  M. A. Thornton, “A Transfer Function Model for Ternary Switching Logic Circuits,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 103-108, May 24-25, 2013.
 

M. A. Thornton and J. Dworak, “Ternary Logic Network Justification Using Transfer Matrices,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 310-315, May 24-25, 2013.

  M. A. Thornton and T. W. Manikas, “Spectral Response of Ternary Logic Netlists,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), Toyama, Japan, pp. 109-116, May 22-24, 2013.
 

D. Y. Feinstein and M. A. Thornton, “Using the Asynchronous Paradigm for Reversible Sequential Circuit Implementation,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 305-310, May 14-16, 2012.

  R. P. Menon and M. A. Thornton, “Global Multiple-Valued Clock Approach for High-Performance Multi-Phase Clock Integrated Circuits,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 19-24, May 14-16, 2012.
  T. W. Manikas, D. Y. Feinstein, and M. A. Thornton, “Modeling Medical System Threats with Conditional Probabilities Using Multiple-Valued Logic Decision Diagrams,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), Victoria, British Columbia, Canada, pp. 244-249, May 14-16, 2012.
  R. B. Reese, S. A. Smith, and M. A. Thornton, “Uncle-An RTL Approach to Asynchronous Design,” IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), pp. 65-72, May 7-9, 2012.
 

S. Pham, J. L. Dworak, and T. W. Manikas, “An Analysis of Differences Between Trojans Inserted at RTL and at Manufacturing with Implications for their Detectability,” IEEE North Atlantic Test Workshop, May 2012.

 

D. Y. Feinstein and M. A. Thornton, “On the Skipped Variables of Quantum Multiple-Valued Decision Diagrams,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 164-168, May 23-25, 2011.

 

T. W. Manikas, M. A. Thornton, and D. Y. Feinstein, “Using Multiple-Valued Logic Decision Diagrams to Model System Threat Probabilities,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 263-267, May 23-25, 2011.

 

D. M. Easton and M. A. Thornton, “A Compliance Framework to Optimize Product Development in a Regulated Industry,” Intellectbase International Consortium Academic Conference, March 25-26, 2011.

  M. A. Thornton, “Spectral Analysis of Digital Logic Circuit Netlists,” International Conference on Computer Aided Systems Theory (EUROCAST), pp. 414-415, February 6-11, 2011.
  T. W. Manikas, “Modeling of Large-Scale Disaster-Tolerant Systems,” Society for Design and Process Science Conference (SDPS), Dallas, Texas, June 6-11, 2010.
  S. Datla and M. A. Thornton, “Quaternary Voltage-Mode Logic Cells and Fixed-Point Multiplication Circuits,” IEEE International Symposium on Mulitple-Valued Logic (ISMVL), pp. 128-133, May 26-28, 2010.
 

T. W. Manikas, L. L. Spenner, P. D. Krier, M. A. Thornton, S. Nair, and S. A. Szygenda, “An Axiomatic Analysis Approach for Large-Scale Disaster-Tolerant Systems Modeling,” International Multi-Conference on Complexity, Informatics, and Cybernetics (IMIC10), International Conference on Computing, Communications and Control Technologies (CCCT) Int. Institute of Informatics and Systemics (IIIS), Orlando, Florida, pp. 66-70, April 6-9, 2010 (best paper award).

 

P. Ongsakorn, K. Turney, M. A. Thornton, S. Nair, S. Szygenda, and T. W. Manikas, “Cyber Threat Trees for Large System Threat Cataloging and Analysis,” IEEE Systems Conference (SYSCON), San Diego, California, pp. 610-615, April 5-6, 2010.

  L. Spenner, P. Krier, M. Thornton, S. Nair, S. Szygenda, and T. W. Manikas, “Large System Decomposition and Simulation Methodology Using Axiomatic Analysis,” IEEE International Systems Conference, (SYSCON), San Diego, California, pp. 223-227, April 5-6, 2010.
 

T. W. Manikas and M. A. Thornton, “Axiomatic Analysis and Cyber Threat Tree Models for the Development of Large-Scale Disaster-Tolerant Information Security Systems,” Symposium on Information Systems and Computing Technology Network (ISaCTN), April 2010.

 

W. Chen, M. A. Thornton, and P. Gui, “A Digital-to-Frequency Converter Using Redundant Signed Binary Addition,” IEEE Midwest Symposium on Circuits and Systems (MWSCAS), pp. 495-498, August 2-5, 2009.

 

S. Datla, M. A. Thornton, and D. W. Matula, “A Low Power High Performance Radix-4 Approximate Squaring Circuit,” IEEE International Conference on Application-specific Systems, Architectures, and Processors (ASAP), pp. 91-97, July 7-9, 2009.

 

D. Feinstein and M. A. Thornton, “On the Guidance of Reversible Logic Synthesis by Dynamic Variable Ordering,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 132-138, May 21-23, 2009.

 

S. Datla, M. A. Thornton, L. Hendrix, and D. Henderson, “Quaternary Addition Circuits Based on SUSLOC Voltage-Mode Cells and Modeling with System Verilog,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 256-261, May 21-23, 2009.

 

M. A. Thornton, D. W. Matula, L. Spenner, and D. M. Miller, “Quantum Logic Implementation of Unary Arithmetic Operations,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 202-207, May 22-23, 2008.

 

D. Y. Feinstein, M. A. Thornton, and D. M. Miller, “Partially Redundant Logic Detection Using Symbolic Equivalence Checking in Reversible and Irreversible Logic Circuits,” Proceedings of the IEEE/ACM Design, Automation and Test in Europe (DATE), pp. 1378-1381, March 10-14, 2008.

 

L. Li, F. Coyle, and M. A. Thornton, “UML to SystemVerilog Synthesis for Embedded System Models with Support for Assertion Generation,” Proceedings of the ECSI Forum on Design Languages, Paper 10 on CD-ROM, September 18-20, 2007.

 

K. Fazel, J. E. Rice, and M. A. Thornton, “ESOP-based Toffoli Gate Cascade Generation,” Proceedings of the IEEE Pacific Rim Conference on Communications, Computers and Signal Processing, pp. 206-209, August 22-24, 2007.

 

D. Easton, M. A. Thornton, V. S. S. Nair, and J. Stracener, “Axiomatic Design in the Biomedical Device Industry,” Proceedings of the 11th World Multi-Conference on Systemics, Cybernetics and Informatics (WMSCI), July 8-11, 2007.

 

D. Easton, M. A. Thornton, and V. S. S. Nair, “Axiomatic Design Process for Disaster Tolerance,” Proceedings of the 11th World Multi-Conference on Systemics, Cybernetics and Informatics (WMSCI), July 8-11, 2007.

 

D. M. Miller, D. Y. Feinstein, and M. A. Thornton, “Variable Reordering and Sifting for QMDD,” IEEE International Symposium on Multiple Valued Logic (ISMVL), electronic proceedings, Session 2B, paper 1, May 14-16, 2007.

 

M. Amoui, D. Grosse, M. A. Thornton, and R. Drechsler, “Evaluation of Toggle Coverage for MVL Circuits Specified in the SystemVerilog HDL,” IEEE International Symposium on Multiple Valued Logic (ISMVL), electronic proceedings, Session 8B, paper 2, May 14-16, 2007.

 

C. M. Lawler, M. A. Thornton, and S. A. Szygenda, “Techniques for Disaster Tolerant Information Technology Systems,” IEEE Systems Conference, pp. 333-338, April 9-12, 2007.

 

M. A. Harper, M. A. Thornton, and S. A. Szygenda, “Disaster Tolerant Systems Engineering for Critical Infrastructure Protection,” IEEE Systems Conference, pp. 2-8, April 9-12, 2007.

 

L. Li, A. Fit-Florea, M. A. Thornton, and D. W. Matula, “Performance Evaluation of a Novel Table Lookup Method and Architecture for Integer Functions,” IEEE International Conference on Application-specific Systems, Architectures, and Processors (ASAP), pp. 99-104, September 11-13, 2006.

 

D. M. Miller, M. A. Thornton, and D. Goodman, “A Decision Diagram Package for Reversible and Quantum Circuit Simulation,” IEEE Congress on Evolutionary Computation, IEEE World Congress on Computational Intelligence (WCCI), pp. 8597-8604 on Proceedings CD-ROM, July 16-21, 2006 (best paper of session).

 

D. M. Miller and M. A. Thornton, “QMDD: A Decision Diagram Structure for Reversible and Quantum Circuits,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 30-30 on Proceedings CD-ROM, May 17-20, 2006.

 

L. Li, M. A. Thornton, and M. A. Perkowski, “A Quantum CAD Accelerator Based on Grover's Algorithm for Finding the Minimum Fixed Polarity Reed-Muller Form,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 33-33 on Proceedings CD-ROM, May 17-20, 2006.

 

S. A. Szygenda and M. A. Thornton, “Disaster Tolerant Computing and Communications,” International Conference on Cybernetics and Information Technologies, Systems and Applications (CITSA 2005), and International Conference on Information Systems Analysis and Synthesis (ISAS), pp. 171-173, July 14-17, 2005 (invited paper).

 

M. A. Harper, C. Lawler, and M. A. Thornton, “IT Application Downtime, Executive Visibility and Disaster Tolerant Computing,” International Conference on Cybernetics and Information Technologies, Systems and Applications (CITSA 2005), and International Conference on Information Systems Analysis and Synthesis (ISAS), pp. 165-170, July 14-17, 2005 (invited paper).

 

M. A. Thornton, “The Karhunen-Loève Transform of Discrete MVL Functions,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 194-199, May 18-21, 2005.

Workshops


K. N. Smith, J. Henderson, and M. A. Thornton, “Rotation Primitives in Quantum Compilation,” International Workshop on Quantum Compilation (IWQC, in conjunction with IEEE/ACM ICCAD), November 7, 2019 (refereed abstract with presentation).
  M. A. Thornton and K. N. Smith, “Fixed Polarity Pascal Transforms with Computer Algebra Applications,” Reed-Muller Workshop (RM 2019), Proceedings of the Workshop on Applications of the Reed-Muller Expansion in Circuit Design (RMW), pp. 34-45, May 24, 2019 (unpublished workshop proceedings, abstract provided only).
  Y. Sun, H. Jiang, L. Ramakrishnan, M. Segal, J. Dworak, K. Nepal, T. W. Manikas, and R. I. Bahar, “Scan Segment Disable for Capture Power Reduction for Low-Power Decompressed Patterns,” 2019 IEEE North Atlantic Test Workshop (NATW), Essex, VT, USA, May 2019. 
  K. N. Smith and M. A. Thornton, “Automated Mapping Methods for the IBM Transmon Devices,” International Workshop on Post-Binary ULSI Systems (ULSI-WS), pp. 12-17, May 15, 2018.
 

E. Gabrielsen and M. A. Thornton, “Minimizing Ancilla and Garbage Qubits in Reversible Functions,” Southwest Quantum Information and Technology Annual SQuInT Workshop (SQuInT), February 22-24, 2018.

  K. N. Smith, M. A. Thornton, D. L. MacFarlane, T. P. LaFave, Jr., and W. V. Oxford, “Single Qubit Quantum Ring Structures and Applications,” Southwest Quantum Information and Technology Annual SQuInT Workshop (SQuInT), February 22-24, 2018 (refereed abstract).
  K. N. Smith and M. A. Thornton, “MUSTANG-Q: A Technology Dependent Quantum Logic Synthesis and Compilation Tool,” Design Automation for Quantum Computers Workshop, IEEE International Conference on Computer Aided Design (ICCAD-QCEDA), November 13-16, 2017 (refereed abstract and poster presentation).
  M. A. Thornton, D. L. MacFarlane, T. P. LaFave, Jr., W. V. Oxford, “Single Photon Quantum State Oscillator,” NIST Single Photon Workshop, July 31, 2017-August 4, 2017, (unpublished workshop proceedings).
  M. A. Thornton and D. M. Miller, “On the Computation of Reed-Muller Spectra for Cryptography and Switching Theory Applications,” Proceedings of the Workshop on Applications of the Reed-Muller Expansion in Circuit Design (RMW), May 24-25, 2017 (unpublished workshop proceedings, link to abstract only).
  F. Zhang, Y. Sun, X. Shen, K. Nepal, J. Dworak, T. W. Manikas, P. Gui, R.I. Bahar, A. Crouch, and J. Potter, “Using Existing Reconfigurable Logic in 3D Die Stacks for Test,” IEEE North Atlantic Test Workshop, May 2016 (IEEE Excellence in Design and Test Engineering Award).
  M. A. Thornton, “A Vector Space Model for Boolean Switching Networks,” Proceedings of the International Workshop on Boolean Problems (IWSBP), pp. 1-21, September 17-19, 2014 (keynote talk, unpublished workshop proceedings).
  Micah A. Thornton and M. A. Thornton, “On the Relationship of Boolean Function Spectra and Circuit Output Probabilities,” Proceedings of the International Workshop on Boolean Problems (IWSBP), pp. 33-39, September 17-19, 2014 (unpublished workshop proceedings, link to abstract only).
  T. W. Manikas, M. A. Thornton, and F. R. Chang, “Mission Planning Analysis Using Decision Diagrams,’ (abstract only), Proceedings of the Workshop on Applications of the Reed-Muller Expansion in Circuit Design (RMW), pp. 61-65, May 24-25, 2013 (unpublished workshop proceedings, link to abstract only).
  K. Nepal, X. Shen, J. Dworak, T. W. Manikas, and R. I. Bahar, “Harnessing an FPGA for Built-in Self-Repair in a 3D Die Stack,” IEEE North Atlantic Test Workshop, May 2013.
  M. A. Thornton and J. Dworak, “Direct Reed-Muller Transform of Digital Logic Netlists,” Proceedings of the Workshop on Applications of the Reed-Muller Expansion in Circuit Design and Representations and Methodology of Future Computing Technology (RMW), pp. 11-20, May 25-26, 2011.
  J. Rice, K. Fazel, M. A. Thornton, and K. Kent, “Toffoli Gate Cascade Generation Using ESOP Minimization and QMDD-Based Swapping,” Proceedings of the Applications of the Reed-Muller Expansion in Circuit Design and Representations and Methodology of Future Computing Technology (RMW), pp. 63-72, May 23-24, 2009.
  D. M. Miller and M. A. Thornton, “QMDD and Spectral Transformation of Binary and Multiple-Valued Functions,” 8th International Workshop on Boolean Problems (IWBP), pp. 137-144, September 18-19, 2008.
  D. Goodman, M. A. Thornton, D. Y. Feinstein, and D. M. Miller, “Quantum Logic Circuit Simulation Based on the QMDD Data Structure,” Proceedings of the Workshop on Applications of the Reed-Muller Expansion in Circuit Design and Representations and Methodology of Future Computing Technology (RMW), pp. 99-105, May 16, 2007.
  D. Y. Feinstein and M. A. Thornton, “ESOP Transformation to Majority Gates for Quantum-dot Cellular Automata Logic Synthesis,” Proceedings of the Workshop on Applications of the Reed-Muller Expansion in Circuit Design and Representations and Methodology of Future Computing Technology (RMW), pp. 43-50, May 16, 2007.
  C. M. Lawler, M. A. Harper, and M. A. Thornton, “Components of Disaster Tolerant Computing,” International Workshop on Information Assurance, in conjunction with the IEEE International Performance Computing and Communications Conference, pp. 380-386, April 11-13, 2007.

Articles, Interviews, Opinion Pieces and Media


CBS DFW channel 11 (web edition), SMU Lands $1M For Research Aimed At Cybersecurity, Quantum Computing Breakthroughs, December 8, 2020, from SMU press release. Also, numerous other online articles resulted including those posted at enterpriseai.news, insidequantumtechnology.com, newsbreak.com, sciencex.com, quantumzeitgeist.com, techtransfercentral.com, dallasinnovates.com, insidehpc.com, newlocker.com, December 2020 SMU Lyle Insider magazine, and others.
 

Houston Chronicle (print edition), Hypersonic A&M, Opinion Editor, October 30, 2020, interviewed and quoted regarding quantum computing research in the U.S. and at SMU, hpcwire.com and others.

 

Software Developed by SMU Stops Ransomware Attacks, Communications of the ACM (online edition), May 15, 2020.

  Communications of the ACM (CACM), Tech News (online edition), Software Developed by SMU Stops Ransomware Attacks, online version of the CACM magazine by ACM, May 15, 2020.
 

KRLD interview of M. A. Thornton, Deason Institute’s sensor-based ransomware detection research, aired at 6:52AM, https://app.radio.com/htntJ0D0t6, May 14, 2020.

  The Daily Sentinel (Nacodoches, TX daily newspaper), SMU develops anti-ransomware program, authored by AP, staff writer Josh Edwards, and SMU office of public relations, quotes from M. A. Taylor and M. A. Thornton, May 13, 2020.
  Numerous on-line magazines ran articles about the Deason Institute research results in ransomware detection. Including EurekaAlert! Science New-AAAS, newsbreak.com, Cyber Daily Report, CywareSocial, helpnetsecurity, DigitPol, phys.org-Security News, redes-zone (in Spanish), sciencebusiness.tech, sciencebusinesstechnews, scienmag.com-Technology, TechXplore, and others, May 13-18, 2020.
  KRLD radio, live segment interview with M. A. Thornton, Cybersecurity concerns related to COVID19 pandemic, April 2, 2020
 

Dallas Morning News (print edition), The sound of things to come, Jordan Wilkerson, describes research about keyboard/smartphone snooping privacy, September 23, 2019, features E.C. Larson and M. A. Thornton.

 

BBC radio, BBC World Service and two local UK BBC radio stations, interviewed by Oliver Conway and included in a radio piece about keyboard/smartphone snooping privacy, (audio recording at 11:33), additional similar stories on Dallas KRLD and KLIF radio stations, interview of M. A. Thornton.

 

Now hackers can use smartphones to secretly listen to what you're typing on your laptop keyboard, Forbes, August 20, 2019, (authored by Jeb Su, Forbes correspondent with interview of M. A. Thornton).

 

Communications of the ACM (CACM), Tech News (online edition), SMU Researchers Find a New Way to Snoop with Smartphones. Should You Be Worried?, features E.C. Larson and M. A. Thornton, August 19, 2019.

  SMU researchers find a new way to snoop with smartphones. But should you be worried?, Dallas Morning News (online edition), August 13, 2019, (authored by Jordan Wilkerson, science reporter, also picked up by the Chicago Tribune, similar articles were written based on an SMU press release and appeared in several other newspapers, TV news, magazines, and online publications such as Yahoo! News), features E.C. Larson and M. A. Thornton.
  ABC 10 TV News story, Sacramento, CA, Hackers could hear your password when you type, (several other TV news channels ran this story including 12 News Phoenix, AZ; WTHR Pittsburgh, PA; WFMY Greensboro, NC; CBS19 Tyler, TX; WCNC, Charlotte, NC; WFAA, Dallas, TX; 9News, Sydney, Australia; many others, features E.C. Larson and M. A. Thornton.
  This Could Change Everything: Bills Would Boost Research Into Radically New Way of Computing,” Dallas Morning News, Editorial, August 7, 2018, (authored by editorial board member Michael Lindenberger, including M. A. Thornton's research efforts in quantum computing at SMU).
  Internet Searches Reveal Bounty of Personal Information,” Dallas-Fort Worth KXAS, Channel 5, NBC affiliate, local news interview aired on August 25, 2011, (reported by Kimberly King with interview of M. A. Thornton), video.
  State Fined Company Named in FBI Search Warrants,” Dallas-Fort Worth KTVT, Channel 11, CBS affiliate, local news interview aired on August 23, 2011, (reported by Jack Fink with interview of M. A. Thornton), video.
  Smart Meters Can Be Hacked: Security Experts,” Dallas-Fort Worth KXAS, Channel 5, NBC affiliate, local news interview aired on September 20 and 21, 2009, (anchored by Ken Kalthoff with interviews of M. A. Thornton and V.S. Nair), video.

Abstracts

Y. Sun, H. Jiang, L. Ramakrishnan, M. Segal, J. Dworak, T. W. Manikas, K. Nepal, and R. I. Bahar, “Test Architecture for Fine Grained Capture Power Reduction”, 2019 26th IEEE International Conference on Electronics, Circuits and Systems (ICECS), Genova, Italy, November 2019
 

T. W. Manikas and M. A. Thornton, “Model Checking for Security Analysis of Cyber-Physical Systems,” International Conference on Data Intelligence and Security (ICDIS), June 28-30, 2019.

  K. N. Smith and M. A. Thornton, “An Open-Source General Compiler for Quantum Computers,” Free and Open Source Developers European Meeting (FOSDEM), February 3.
  M. A. Thornton, W. V. Oxford, D. L. MacFarlane, and T. P. LaFave, Jr., “Single Qubit Quantum Ring Oscillator and Applications for Storage and True Random Number Generation,” Quantum Simulation & Computation Conference (QSC), February 12-16, 2018.
 

W. V. Oxford, J. S. Gable, M. A. Thornton, D. L. MacFarlane, and T. P. LaFave, Jr., “Design and Implementation of a Photonic Quantum Storage Device,” IBM Think Q Conference, December 6-8, 2017.

  M. A. Thornton, D. L. MacFarlane, T. P. LaFave, Jr., and W. V. Oxford, “Single Photon Quantum State Oscillator,” NIST Single Photon Workshop (SPW), p. 140, July 31 - August 4, 2017.
 

Micah A. Thornton, J. Rendon, G. Pham, and M. A. Thornton, “Sample Size Calculations using Techniques from Power Analysis,” ASA Conference on Statistical Practice (CSP), p. 27, February 20, 2016.

  J. Rendon, M. A. Thornton, Micah A. Thornton, and G. Pham, “Use of Hamming Weights Instead of Uniform Distributions to Analyze a Set of Strings for Randomness,” ASA Conference on Statistical Practice (CSP), p. 27, February 20, 2016.
  T. W. Manikas and M. A. Thornton, “Axiomatic Analysis and Cyber Threat Tree Models for the Development of Large-Scale Disaster-Tolerant Information Security Systems,” Raytheon Information Systems and Computing Technology Network Symposium (ISaCTN), April 21, 2010.

Technical Reports


C. N. Frisbee, “An Overview of Placement and Routing Algorithms for PCB, VLSI, and MCM Designs with a Proposal for a New MCM Routing Algorithm,” Technical Report, Dept. of Computer Systems Engineering, University of Arkansas, Fayetteville, Arkansas, 1996 (directed by M. A. Thornton).

  M. A. Thornton and V. S. S. Nair, “Boolean Function Spectrum Computation Using a Structural Representation,” Technical Report, Southern Methodist University, CSE-9440, 1994.
  M. A. Thornton and V. S. S. Nair, “Applications and Efficient Computation of Spectral Coefficients for Digital Logic,” Technical Report, Southern Methodist University, CSE-9413, 1994.
  M. A. Thornton and V. S. S. Nair, “Reed-Muller Circuit Synthesis Using Numerical Methods,” Technical Report, Southern Methodist University, CSE-9319, 1993.
 

M. A. Thornton and V. S. S. Nair, “Iterative Combinational Logic Synthesis Techniques Using Spectral Data,” Technical Report, Southern Methodist University, CSE-9208, 1992.