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Journal Articles

     
 K. N. Smith and M. A. Thornton, “Higher Dimension Quantum Entanglement Generators,” ACM Journal on Emerging Technologies in Computing (JETC), 2019 (to appear).
  M. A. Thornton, X. Wang, T. Liu, S. Guo and P. Gui, “A 2.56 Gbps Serial Wireline Transceiver that Supports an Auxiliary Channel in 65 nm CMOS,” IEEE Transactions on VLSI, 2019 (to appear).
  M. A. Thornton, T. Giallanza, T. Siems, E. Sharp, E. Gabrielsen, I. Johnson and E.C. Larson, “Keyboard Snooping from Mobile Phone Arrays with Mixed Convolutional and Recurrent Neural Networks,” Proc. of the ACM on Interactive, Mobile, Wearable and Ubiquitous Technologies, Vol. 3, No. 2, pp. 45-1 - 45-22, June 2019.
  K. N. Smith, T. P. LaFave Jr., D. L. MacFarlane and M. A. Thornton, “Higher-Radix Chrestenson Gates for Photonic Quantum Computation,” Journal of Applied Logics, Vol. 5, Issue 9, pp. 1781-1798, December 2018.
  M. A. Thornton and S. D. Gupta, “A Fixed-Point Squaring Algorithm Using an Implicit Radix Number System,” IEEE Journal on Emerging and Selected Topics in Circuits and Systems, Vol. 6, Issue 1, pp. 34-43, March 2016 (pre-published February 2016, IEEEXplore).
  M. A. Thornton, P. Niemann, R. Wille, D. M. Miller and R. Drechsler, “QMDDs: Efficient Quantum Function Representation and Manipulation,” IEEE Transactions on Computer-Aided Design, Vol. 35, No. 1, pp. 86-99, January 2016 (pre-published July 21, 2015, IEEEXplore.ieee.org pre-publication version).
  M. A. Thornton, “Simulation and Implication Using a Transfer Function Model for Switching Logic,” IEEE Transactions on Computers, Vol. 64, No. 12, pp. 3580-3590, December 2015 (pre-published February 6, 2015, IEEEXplore.ieee.org pre-publication version).
 

K. Nepal, S. Alhelaly, J. Dworak, R. I. Bahar, T. Manikas and P. Gui, “Repairing a 3D Die-Stack Using Available Programmable Logic,” IEEE Trans. Computer-Aided Design of Integrated Circuits, Vol. 34, No. 5, pp. 849-861, May 2015.
  M. A. Thornton and D. Y. Feinstein, “Quantum Multiple-Valued Decision Diagram: The Case of Skipped Variables,” Journal of Multiple-Valued Logic and Soft Computing, Vol. 24, No. 1-4, pp. 93-108, 2015.
  T. W. Manikas, M. A. Thornton and D. Y. Feinstein, “Modeling System Threat Probabilities Using Mixed-Radix Multiple-Valued Logic Decision Diagrams,” Journal of Multiple-Valued Logic and Soft Computing, Vol. 24, No. 1-4, pp. 135-149, 2015 (invited paper).
  S. Nagayama, T. Sasao, J. Butler, M. Thornton and T. Manikas, “On Optimizations of Edge-Valued MDDs for Fast Analysis of Multi-State Systems,” IEICE Transactions on Information and Systems, Vol. E97-D, No. 9, pp. 2234-2242, September 2014.
  M. A. Thornton and R. P. Menon, “Clock Distribution Area Reduction Using a Multiple-Valued Clocking Approach,” Journal of Multiple-Valued Logic and Soft Computing, Vol. 22, No. 1-2, pp. 21-39, 2014.
 

M. A. Thornton, P. A. Laplante and B. Kalinowski, “A Principles and Practices Exam Specification to Support Software Engineering Licensure in the United States of America,” Software Quality Professional, Vol. 15, Issue 1, pp. 4-15, December 2012.
  M. A. Thornton, “Professional Licensure for Software Engineers: An Update, IEEE Computing in Science and Engineering,” IEEE Computer Society Press and American Institute of Physics, Vol. 14, Issue 5, pp. 86-87, September-October 2012 (IEEEXplore.ieee.org version).
  M. A. Thornton and D. Y. Feinstein, “Reversible Logic Synthesis Based on Decision Diagram Variable Ordering,” Journal of Multiple-Valued Logic and Soft Computing, Vol. 19, No. 4, pp. 325-339, 2012. 
  M. A. Thornton and D. Easton, “Business Process Development Through the Use of a Modified Axiomatic Design Methodology,” Journal of International Business Management & Research, Vol. 2, Issue 4, May 2011. 
  T. W. Manikas, L. L. Spenner, P. D. Krier, M. A. Thornton, S. Nair and S. A. Szygenda, “An Axiomatic Analysis Approach for Large-Scale Disaster-Tolerant Systems Modeling,” Journal of Systematics, Cybernetics and Informatics, Vol. 9, No. 1, pp. 89-93, 2011.
  M. A. Thornton and S. F. Barrett, “To PE or not to PE ... The Sequel, IEEE Computing in Science and Engineering,” IEEE Computer Society Press and American Institute of Physics, Vol. 12, No. 4, pp. 62-65, July/August 2010 (IEEEXplore.ieee.org version).
  M. A. Thornton, D. Y. Feinstein and D.M. Miller, “Minimization of Quantum Multiple-Valued Decision Diagrams Using Data Structure Metrics,” Journal of Multiple-Valued Logic and Soft Computing, Vol. 15, No. 4, pp. 361-377, 2009. 
 

M. A. Thornton, W. Chen and P. Gui, “A Redundant Signed Binary Addition Based Digital-to-Frequency Converter,” IEE Electronics Letters, Vol. 45, No. 2, pp. 824-826, July 2009.
 

M. A. Thornton, A. Fit-Florea, L. Li and D. W. Matula, “A Discrete Logarithm Number System for Integer Arithmetic Modulo 2k: Algorithms and Lookup Structures,” IEEE Transactions on Computers, Vol. 58, No. 2, pp. 163-174, February 2009 (IEEEXplore.ieee.org version).

Books

       

M. A. Thornton, “Modeling Digital Switching Circuits with Linear Algebra,” Morgan & Claypool Publishers, San Rafael, California, ISBN 9781627052337 (hardcopy), ISBN 9781627052344 (eBook), April 2014. 

M. A. Thornton and L. Li, “Digital System Verification: A Combined Formal Methods and Simulation Framework,” Morgan & Claypool Publishers, San Rafael, California, ISBN 9781608451784 (hardcopy), ISBN 9781608451791 (eBook), February 2010.

Book Chapters and Encyclopedia Articles

    

M. A. Thornton, “Further Improvements in the Boolean Domain,” Foreward, pp. xix - xxii, Cambridge Scholars Publishing, Cambridge, UK, Bernd Steinbach, Editor, 2018, ISBN 13-978-1-5275-0371-7, 10-1-5275-0371-2, January 1, 2018. 
 

M. A. Thornton, “A Vector Space Method for Boolean Networks,” in Problems and New Solutions in the Boolean Domain, Chapter 1, Section 1.1, pp. 3-50, Cambridge Scholars Publishing, Cambridge, UK, Bernd Steinbach, editor, 2015, ISBN 13-978-1-4438-8947-6; 10-1-4438-8947-4, January 5, 2016.
  M. A. Thornton and Micah A. Thornton, “Boolean Function Spectra and Circuit Probabilities,” in Problems and New Solutions in the Boolean Domain, Chapter 4, Section 4.1, pp. 269-286, Cambridge Scholars Publishing, Cambridge, UK, Bernd Steinbach, editor, 2015, ISBN 13-978-1-4438-8947-6; 10-1-4438-8947-4, January 5, 2016.
  M. A. Thornton, “The Best of IEEE-USA Insight: On Licensing Software Engineers,” Article Reprints in Parts I, II, and III, IEEE-USA Publishing, Washington D.C., compiled by P. A. Laplante, Georgia C Stelluto, editor, 2015.
 

M. A. Thornton, R. Kotamarti and M.H. Dunham, “Quantum Computing Approach for Alignment-Free Sequence Search and Classification,” in Multidisciplinary Computational Intelligence Techniques: Applications in Business, Engineering, and Medicine, Chapter 17, pp. 279-300, IGI-Global Press, S. Ali, N. Abbadeni and M. Batouche, editors, ISBN 978-1-4666-1830-5 (hardcopy), ISBN 978-1-4666-1831-2 (eBook), May 2012. 
 

M. A. Thornton and P. A. Laplante, “Licensing Professional Software Engineers in the United States of America,” Article in the Encyclopedia of Software Engineering, pp. 1-8, Taylor & Francis, New York, DOI: 10.1081/E-ESE, ISBN:1-4200-5977-7; eISBN: 1-4200-5978-5, Published online: April 24, 2012.
  M. A. Thornton, “Keystroke Dynamics,” Article in the Encyclopedia of Cryptography and Security, 2nd edition, pp. 688-691, Springer Publishers, H. C. A. van Tilborg and S. Jajodia, editors, ISBN 978-1-4419-5905-8, November 2011.

Patents

    M. A. Taylor, K. N. Smith and M. A. Thornton, “Detecting Malicious Software using Sensors,” U.S. Patent Application No. 15,812,663 filed on November 14, 2017.
  M. A. Thornton and S. Gupta, “Fixed-Point Digit Serial Squaring Algorithm,” U.S. Patent No. 9,684,489, issued on June 20, 2017. 
  M. A. Thornton, J. D. Allen and J. J. Howard, “Method for Subject Classification Using a Pattern Recognition Input Device,” U.S. Patent No. 9,329,699, issued on May 3, 2016, Application No. 13/279,279, filed on October 22, 2011, claiming priority from provisional patent application 61/405,988, filed on October 22, 2010. 
  M. A. Thornton and R. Menon, “Single Clock Distribution Network for Multi-Phase Clock Integrated Circuits,” U.S. Patent No. 8,847,625, issued on September 30, 2014, Application No. 13/769,313, filed on February 16, 2013, claiming priority from provisional patent application 61/599,598, filed February 16, 2012.
 

M. A. Thornton, D. W. Matula, A. Fit-Florea and L. Li, “Determining a Table Output of a Table Representing a Hierarchical Tree for an Integer Valued Function,” U.S. Patent No. 7,962,537, issued on June 14, 2011, filed on June 26, 2007.
 

M. A. Thornton, W. V. Oxford, D. L. MacFarlane and T. P. LaFave, Jr., “Systems and Methods for Quantum Coherence Preservation of Qubits,” U.S. Patent Publication No. US2018/0157986A1, published on June 7, 2018, Application No. 15/832,285, filed on December 5, 2017, claiming priority from: Bell State Oscillator and Applications for Same, provisional patent no. 62/430,501, filed on December 6, 2016.
  M. A. Thornton, D. L. MacFarlane, T. P. LaFave, Jr. and W. V. Oxford, “Systems and Methods for Preservation of Qubits," U.S. Patent Publication No. US2018/0314969A1, published on November 1, 2018, Application No. 15/965,286, filed on April 27, 2018, claiming priority from: Quantum State Oscillators and Methods for Operation and Construction of Same, provisional patent no. 62/491,815, filed April 28, 2017.
  M. A. Thornton, M. A. Taylor and K. N. Smith, “Detecting Malicious Software Using Sensors,” U.S. Patent Application No. 15/812,663, filed November 14, 2017. 
 

M. A. Thornton, W.V Oxford, D.L. MacFarlane, T.P. LaFave, Jr. and J.S. Gable, “Systems and Methods for Implementing Photonic Quantum Storage,” U.S. Provisional Patent Application No. 62/613,262, filed January 3, 2018.
 

M. A. Thornton, E. C. Larson, E. Gabrielsen and I. Johnson, “Method and System for Increasing the Effective Sample Rate of a Sampled Signal,” U.S. Patent Pending.
  M. A. Thornton, D. L. MacFarlane and W. V. Oxford, “Method and System for Constructing a Multi-source Entropy Extractor-Based Quantum Photonic TRNG,” U.S. Provisional Patent Application No. 62/822,232, filed March 22, 2019.

Conferences

  

K. N. Smith and M. A. Thornton, “Fixed Polarity Pascal Transforms with Computer Algebra Applications,” IEEE Pacific Rim Conference on Communications, Computers, and Signal Processing (PacRim), August 21 - 23, 2019.
 

K. N. Smith and M. A. Thornton, “Quantum Logic Synthesis with Formal Verification,” IEEE Midwest Symposium on Circuits and Systems (MWSCAS), pp. 73 – 76, August 4-7, 2019.
  M. A. Thornton and J. Medellin, “A Discussion on Blockchain Software Quality Attribute Design and Tradeoffs,” International Conference on Emerging Topics in Computing (iCETiC), August 19-20, 2019, Springer Nature, LNICST Vol. 285, pub. date: July 14, 2019, pp. 19-28. 
  K. N. Smith and M. A. Thornton, “A Quantum Computational Compiler and Design Tool for Technology-Specific Targets,” ACM/IEEE International Symposium on Computer Architecture (ISCA), pp. 579 – 588, June 22-26, 2019. 
  K. N. Smith, M. Soeken, B. Schmitt, G. De Micheli and M. A. Thornton, “Using ZDDs in the Mapping of Quantum Circuits,” Quantum Physics and Logic Conference (QPL), pp. 1 – 11, June 10-14, 2019, arXiv:1901.02406. 
  T. W. Manikas and M. A. Thornton, “Model Checking for Security Analysis of Cyber-Physical Systems,” International Conference on Data Intelligence and Security (ICDIS), South Padre Island, TX, June 2019. 
 

K. N. Smith and M. A. Thornton, “Entanglement in Higher-Radix Quantum Systems,” IEEE Symposium on Multiple Valued Logic (ISMVL), pp. 162-167, May 21-23, 2019, arXiv:1906.00491.
 

M. A. Thornton, T. Giallanza, E. Gabrielsen, M. A. Taylor and E. C. Larson, “Task Value Calculus: Multi-Objective Tradeoff Analysis using Multiple-valued Decision Diagrams,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 126-131, May 21-23, 2019.
  M. A. Thornton and D. L. MacFarlane, “Quantum Photonic TRNG with Dual Extractor,” International Conference on Networked Systems/Workshop on Quantum Technology and Optimization Problems (NetSys/QTOP), Springer-Verlag LNCS 11413, pp. 171-182, March 18-21, 2019, presentation video. 
 

M. A. Thornton and J. Medellin, “Performance Characteristics of Two Blockchain Consensus Algorithms in a VMware Hypervisor,” in proc. International Conference on Grid, Cloud, and Cluster Computing (GCC), July 30, 2018.
 

M. A. Thornton and J. Medellin, “Simulating Resource Consumption in Three Blockchain Consensus Algorithms,” in proc. International Conference on Modeling, Simulation and Visualization Methods (MSV), July 30, 2018.
 

M. A. Thornton, X. Wang, T. Liu, S. Guo and P. Gui, “A 2.56 Gbps Asynchronous Serial Transceiver with Embedded 80 Mbps Secondary Data Transmission Capability in 65nm CMOS,” IEEE Radio Frequency Integrated Circuits Symposium (RFIC), pp. 360-363, June 10-12, 2018.
 

M. A. Thornton and Micah A. Thornton, “Multiple-Valued Random Digit Extraction,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 162-167, May 16-18, 2018.
  K. N. Smith, T. P. LaFave Jr., D. L. MacFarlane and M. A. Thornton, “A Radix-4 Chrestenson Gate for Optical Quantum Computation,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 260-265, May 16-18, 2018.
  M. A. Taylor, K. N. Smith and M. A. Thornton, “Sensor-Based Ransomware Detection,” Future Technologies Conference (FTC), pp. 794-801, November 29-30, 2017.
  M. A. Thornton and D. K. Houngninou, “Simulation of Switching Circuits using Transfer Functions,” IEEE Midwest Symposium on Circuits and Systems (MWSCAS), pp. 511-514, August 6-9, 2017.
  S. Alhelaly, J. Dworak, T. Manikas, P. Gui, K. Nepal and A. L. Crouch, "Detecting a Trojan Die in 3D Stacked Integrated Circuits," 2017 IEEE North Atlantic Test Workshop (NATW), Providence, RI, USA, pp. 1-6, May 2017.
 

K. N. Smith, M. A. Taylor, A. A. Carroll, T. W. Manikas and M. A. Thornton, "Automated Markov-Chain Based Analysis for Large State Spaces," Annual IEEE International Systems Conference (SysCon), Montreal, QC, Canada, pp. 306-313, April 24-27, 2017.
 

M. A. Thornton and A. Alharbi, “Demographic Group Prediction Based on Smart Device User Recognition Gestures,” IEEE International Conference on Machine Learning and Applications (ICMLA), pp. 100-107, December 18-20, 2016.
 

M. A. Thornton and D. K. Houngninou, “Implementation of Switching Circuit Models as Transfer Functions,” IEEE International Symposium on Circuits and Systems (ISCAS), pp. 2167-2170, May 22-25, 2016.
  P. C. Davis, M. A. Thornton and T. W. Manikas, “Reliability Block Diagram Extensions for Non-Parametric Probabilistic Analysis,” IEEE International Systems Conference (SysCon), pp. 927-932, April 18-21, 2016.
  M. A. Thornton and A. Alharbi, “Demographic Group Classification of Smart Device Users,” IEEE International Conference on Machine Learning and Applications (ICMLA), pp. 481-486, December 9-11, 2015.
  T. W. Manikas, M. A. Thornton and S. Nagayama, “An Improved Methodology for System Threat Analysis Using Multiple-Valued Logic and Conditional Probabilities,” Society for Design and Process Science Conference (SDPS), November 1-5, 2015.
  K. N. Smith, M. A. Thornton, “A Multiple-Valued Logic Synthesis Tool for Optical Computing Elements,” IEEE Dallas Circuits and Systems Conference (DCAS), pp. 1-4, paper 38-2.3, October 12-13, 2015.
  S. Nagayama, T. Sasao, J. Butler, M. Thornton and T. Manikas, “Edge Reduction for EVMDDs to Speed Up Analysis of Multi-State Systems,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 170-175, May 18-20, 2015.
 

M. Thornton, T. Manikas, S. Szygenda and S. Nagayama, "System Probability Distribution Modeling Using MDDs," IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 196-201, May 19-21, 2014.
 

S. Nagayama, T. Sasao, J. Butler, M. Thornton and T. Manikas, "Analysis Methods of Multi-State Systems Partially Having Dependent Components Using Multiple-Valued Decision Diagrams," IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 190-195, May 19-21, 2014.
  M. A. Thornton, T. W. Manikas and P. A. Laplante, “Embedded and Real-Time Systems Classes in Traditional and Distance Format,” Frontiers in Education Conference (FIE), pp. 1379-1385, October 23-26, 2013.
  K. Nepal, X. Shen, J. Dworak, T. Manikas, R. I. Bahar, “Built-in Self-Repair in a 3D Die Stack Using Programmable Logic,” IEEE Symposium Defect and Fault Tolerance in VLSI and Nanotechnology Systems, pp. 243-248, October 2013.
 

M. A. Thornton, J. Moore and D. W. Matula, “Low Power Floating-Point Multiplication and Squaring Units with Shared Circuitry,” IEEE Midwest Symposium on Circuits and Systems (MWSCAS), pp. 1395-1398, August 4, 2013.
 

M. A. Thornton, “A Transfer Function Model for Ternary Switching Logic Circuits,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 103-108, May 24-25, 2013.
  M. A. Thornton and J. Dworak, “Ternary Logic Network Justification Using Transfer Matrices,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 310-315, May 24-25, 2013.
 

M. A. Thornton and T. W. Manikas, "Spectral Response of Ternary Logic Netlists," IEEE International Symposium on Multiple-Valued Logic (ISMVL), Toyama, Japan, pp. 109-116, May 22-24, 2013.
  M. A. Thornton, L. Kinney and M. Liu, “Faculty and Student Perceptions of Online Learning in Engineering Education,” ASEE Annual Conference, June 10-13, 2012.
  M. A. Thornton and D. Y. Feinstein, “Using the Asynchronous Paradigm for Reversible Sequential Circuit Implementation,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 305-310, May 14-16, 2012.
  M. A. Thornton and R. P. Menon, “Global Multiple-Valued Clock Approach for High-Performance Multi-Phase Clock Integrated Circuits,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 19-24, May 14-16, 2012.
  T. W. Manikas, D. Y. Feinstein, M. A. Thornton, “Modeling Medical System Threats with Conditional Probabilities Using Multiple-Valued Logic Decision Diagrams,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), Victoria, British Columbia, Canada, pp. 244-249, May 14-16, 2012.
 

M. A. Thornton, R. B. Reese and S. A. Smith, “Uncle-An RTL Approach to Asynchronous Design,” IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC), pp. 65-72, May 7-9, 2012.
  S. Pham, J. L. Dworak and T. W. Manikas, “An Analysis of Differences Between Trojans Inserted at RTL and at Manufacturing with Implications for their Detectability,” IEEE North Atlantic Test Workshop, May 2012.
 

M. A. Thornton and D.Y. Feinstein. “On the Skipped Variables of Quantum Multiple-Valued Decision Diagrams,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 164-168, May 23-25, 2011.
  T. W. Manikas, M. A. Thornton, D. Y. Feinstein, “Using Multiple-Valued Logic Decision Diagrams to Model System Threat Probabilities,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), Tuusula, Finland, pp. 263-267, May 23-25, 2011.
  M. A. Thornton and D. M. Easton, “A Compliance Framework to Optimize Product Development in a Regulated Industry,” Intellectbase International Consortium Academic Conference, March 25-26, 2011.
  M. A. Thornton, “Spectral Analysis of Digital Logic Circuit Netlists,” International Conference on Computer Aided Systems Theory (EUROCAST), pp. 414-415, February 6-11, 2011.
 

T. W. Manikas, “Modeling of Large-Scale Disaster-Tolerant Systems,” Society for Design and Process Science Conference (SDPS), Dallas, Texas, June 6-11, 2010.
 

M. A. Thornton and S. Datla, “Quaternary Voltage-Mode Logic Cells and Fixed-Point Multiplication Circuits,” IEEE International Symposium on Mulitple-Valued Logic (ISMVL), pp. 128-133, May 26-28, 2010.
 

T. W. Manikas, L. L. Spenner, P. D. Krier, M. A. Thornton, S. Nair and S. A. Szygenda, “An Axiomatic Analysis Approach for Large-Scale Disaster-Tolerant Systems Modeling,” International Multi-Conference on Complexity, Informatics, and Cybernetics (IMIC10), International Conference on Computing, Communications and Control Technologies (CCCT) Int. Institute of Informatics and Systemics (IIIS), Orlando, Florida, pp. 66-70, April 6-9, 2010 (best paper award).
 

P. Ongsakorn, K. Turney, M. Thornton, S. Nair, S. Szygenda, and T. Manikas, “Cyber Threat Trees for Large System Threat Cataloging and Analysis,” IEEE Systems Conference (SYSCON), San Diego, California, pp. 610-615, April 5-6, 2010.
 

L. Spenner, P. Krier, M. Thornton, S. Nair, S. Szygenda, and T. Manikas, “Large System Decomposition and Simulation Methodology Using Axiomatic Analysis,” IEEE International Systems Conference, (SYSCON), San Diego, California, pp. 223-227, April 5-6, 2010.
  T. W. Manikas and M. A. Thornton, “Axiomatic Analysis and Cyber Threat Tree Models for the Development of Large-Scale Disaster-Tolerant Information Security Systems,” Symposium on Information Systems and Computing Technology Network (ISaCTN), April 2010.
  M. A. Thornton, W. Chen and P. Gui, “A Digital-to-Frequency Converter Using Redundant Signed Binary Addition,” IEEE Midwest Symposium on Circuits and Systems (MWSCAS), pp. 495-498, August 2-5, 2009.
 

M. A. Thornton, S. Datla and D. W. Matula, “A Low Power High Performance Radix-4 Approximate Squaring Circuit,” IEEE International Conference on Application-specific Systems, Architectures, and Processors (ASAP), pp. 91-97, July 7-9, 2009.
 

M. A. Thornton and D. Feinstein, “On the Guidance of Reversible Logic Synthesis by Dynamic Variable Ordering,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 132-138, May 21-23, 2009.
 

M. A. Thornton, S. Datla, L. Hendrix, and D. Henderson, “Quaternary Addition Circuits Based on SUSLOC Voltage-Mode Cells and Modeling with System Verilog,” IEEE International Symposium on Multiple-Valued Logic (ISMVL), pp. 256-261, May 21-23, 2009.

Workshops


 M. A. Thornton and K. N. Smith, “Fixed Polarity Pascal Transforms with Computer Algebra Applications,” Reed-Muller Workshop (RM 2019), Proceedings of the Workshop on Applications of the Reed-Muller Expansion in Circuit Design (RMW), pp. 34-45, May 24, 2019 (unpublished workshop proceedings, abstract provided only).
  K. N. Smith and M. A. Thornton, “Automated Mapping Methods for the IBM Transmon Devices,” International Workshop on Post-Binary ULSI Systems (ULSI-WS), pp. 12-17, May 15, 2018.
  M. A. Thornton and E. Gabrielsen, “Minimizing Ancilla and Garbage Qubits in Reversible Functions,” Southwest Quantum Information and Technology Annual SQuInT Workshop (SQuInT), February 22-24, 2018.
  K. N. Smith, M. A. Thornton, D. L. MacFarlane, T. P. LaFave Jr. and W. V. Oxford, “Single Qubit Quantum Ring Structures and Applications,” Southwest Quantum Information and Technology Annual SQuInT Workshop (SQuInT), February 22-24, 2018 (refereed abstract).
 

K. N. Smith and M. A. Thornton, “MUSTANG-Q: A Technology Dependent Quantum Logic Synthesis and Compilation Tool,” Design Automation for Quantum Computers Workshop, IEEE International Conference on Computer Aided Design (ICCAD-QCEDA), November 13-16, 2017 (refereed abstract and poster presentation).
  M. A. Thornton and D.M. Miller, “On the Computation of Reed-Muller Spectra for Cryptography and Switching Theory Applications,” Proceedings of the Workshop on Applications of the Reed-Muller Expansion in Circuit Design (RMW), May 24-25, 2017 (unpublished workshop proceedings, link to abstract only).
  F. Zhang, Y. Sun, X. Shen, K. Nepal, J. Dworak, T. Manikas, P. Gui, R.I. Bahar, A. Crouch and J. Potter, “Using Existing Reconfigurable Logic in 3D Die Stacks for Test,” IEEE North Atlantic Test Workshop, May 2016 (IEEE Excellence in Design and Test Engineering Award).
  M. A. Thornton, “A Vector Space Model for Boolean Switching Networks,” Proceedings of the International Workshop on Boolean Problems (IWSBP), pp. 1-21, September 17-19, 2014 (invited talk, link to abstract only, unpublished workshop proceedings).
  M. A. Thornton and Micah Thornton, “On the Relationship of Boolean Function Spectra and Circuit Output Probabilities,” Proceedings of the International Workshop on Boolean Problems (IWSBP), pp. 33-39, September 17-19, 2014 (unpublished workshop proceedings, link to abstract only).
  T. W. Manikas, M. A. Thornton and F. R. Chang, "Mission Planning Analysis Using Decision Diagrams," (abstract only), Proceedings of the Workshop on Applications of the Reed-Muller Expansion in Circuit Design (RMW), pp. 61-65, May 24-25, 2013 (unpublished workshop proceedings, link to abstract only).
  K. Nepal, X. Shen, J. Dworak, T. Manikas and R.I. Bahar, "Harnessing an FPGA for Built-in Self-Repair in a 3D Die Stack,” IEEE North Atlantic Test Workshop, May 2013.
  M. A. Thornton and J. Dworak, “Direct Reed-Muller Transform of Digital Logic Netlists,” Proceedings of the Workshop on Applications of the Reed-Muller Expansion in Circuit Design and Representations and Methodology of Future Computing Technology (RMW), pp. 11-20, May 25-26, 2011.
  M. A. Thornton, J. Rice, K. Fazel and K. Kent, “Toffoli Gate Cascade Generation Using ESOP Minimization and QMDD-Based Swapping,” Proceedings of the Applications of the Reed-Muller Expansion in Circuit Design and Representations and Methodology of Future Computing Technology (RMW), pp. 63-72, May 23-24, 2009.

Articles, Interviews, Opinion Pieces and Media


 M. A. Thornton, “This Could Change Everything: Bills Would Boost Research Into Radically New Way of Computing,” Dallas Morning News, Editorial, August 7, 2018, (authored by editorial board member Michael Lindenberger, including M. A. Thornton's research efforts in quantum computing at SMU).
 

M. A. Thornton, “Licensure and Certification: Two Different Forms of Professional Credentials,” ME Today, July 2014, (reprint of IEEE-USA Today's Engineer article in the mechanical engineering society ASME publication, ME Today).
 

M. A. Thornton, “Licensure and Certification: Two Different Forms of Professional Credentials,” IEEE-USA Today's Engineer, May 2014.
  M. A. Thornton, “The Path to Licensure,” PE The Magazine for Professional Engineers, published by the NSPE, p. 24-27, October 2012, (authored by D. Boykin with quotes from interview of M. A. Thornton).
 

M. A. Thornton, “Intellectual Property Engineering Consulting and Professional Licensure,” IEEE-USA Today's Engineer, October 2011.
  M. A. Thornton, “Internet Searches Reveal Bounty of Personal Information,” Dallas-Fort Worth KXAS, Channel 5, NBC affiliate, local news interview aired on August 25, 2011, (reported by Kimberly King with interview of M. A. Thornton), video.
  M. A. Thornton, “State Fined Company Named in FBI Search Warrants,” Dallas-Fort Worth KTVT, Channel 11, CBS affiliate, local news interview aired on August 23, 2011, (reported by Jack Fink with interview of M. A. Thornton), video.
  M. A. Thornton and P. A. Laplante, “When Do Software Systems Need to be Engineered?,” IEEE-USA Today's Engineer, July 2011.
 

M. A. Thornton and A. Collins, “Should You Take the Computer Engineering PE Exam or the Electrical and Electronics Engineering PE Exam?,” IEEE-USA Today's Engineer, April 2011. 
 

M. A. Thornton and P. A. Laplante, “IEEE-USA and IEEE Computer Society Cooperate in New Professional Software Engineering Licensure Initiative,”, IEEE-USA Today's Engineer (full version), January 2011.
 

M. A. Thornton and P. A. Laplante, “IEEE-USA and IEEE Computer Society Cooperate in New Professional Software Engineering Licensure Initiative,” IEEE-USA in ACTION (shortened version), pp. 7-8, December 2010. 
 

M. A. Thornton, S.F. Barrett and D.L. Whitman, “Potential Change Slated for PE Educational Requirements,” IEEE-USA Today's Engineer, June 2010.
  M. A. Thornton, “Why Should You Become a Licensed Professional Engineer?,”  IEEE-USA Today's Engineer, February 2010.
  M. A. Thornton, “Smart Meters Can Be Hacked: Security Experts,” Dallas-Fort Worth KXAS, Channel 5, NBC affiliate, local news interview aired on September 20 and 21, 2009, (anchored by Ken Kalthoff with interviews of M.A. Thornton and V.S. Nair), video.
  M. A. Thornton, “Software Engineering PE Examination Development Approved,” IEEE-USA Today's Engineer, September 2009.
  M. A. Thornton, J. Moore and R. W. Skeith, “Why Computer Engineering Students Should Take the Fundamentals of Engineering Examination and How Professors Can Help,” IEEE-USA Today's Engineer, June 2009.

Abstracts

M. A. Thornton and T. W. Manikas, “Model Checking for Security Analysis of Cyber-Physical Systems,” International Conference on Data Intelligence and Security (ICDIS), June 28-30, 2019 (poster).
 

K. N. Smith and M. A. Thornton, “An Open-Source General Compiler for Quantum Computers,” Free and Open Source Developers European Meeting (FOSDEM), February 3, 2019 (refereed abstract).
  M. A. Thornton, W. V. Oxford, D. L. MacFarlane and T. P. LaFave, Jr., “Single Qubit Quantum Ring Oscillator and Applications for Storage and True Random Number Generation,” Quantum Simulation & Computation Conference (QSC), February 12-16, 2018 (poster).
  M. A. Thornton, William V. Oxford, James S. Gable, Duncan L. MacFarlane and Timothy P. LaFave, Jr., “Design and Implementation of a Photonic Quantum Storage Device,” IBM Think Q Conference, December 6-8, 2017 (poster).
 

M. A. Thornton, D. L. MacFarlane, T. P. LaFave, Jr. and W. V. Oxford, “Single Photon Quantum State Oscillator,” NIST Single Photon Workshop (SPW), p. 140, July 31 - August 4, 2017 (poster).
  M. A. Thornton, J. Rendon and G. Pham, “Sample Size Calculations using Techniques from Power Analysis,” ASA Conference on Statistical Practice (CSP), p. 27, February 20, 2016 (poster).
 

J. Rendon, M.A. Thornton and G. Pham, “Use of Hamming Weights Instead of Uniform Distributions to Analyze a Set of Strings for Randomness,” ASA Conference on Statistical Practice (CSP), p. 27, February 20, 2016 (poster).
  M. A. Thornton, E. Durant, J. Impagliazzo, S. Conroy, R. B. Reese, H. Lam and V. Nelson, “Setting the Stage for CE2016: A Revised Body of Knowledge,” Frontiers in Education Conference (FIE), October 22-25, 2014 (workshop co-facilitator).
  M. A. Thornton, E. Durant, S. Conroy, J. Impagliazzo, A. McGettrick and T. Wilson, “Computer Engineering Curriculum Guidelines Pre-Conference Workshop,” Frontiers in Education Conference, p. 1, October 23-26, 2013 (workshop co-facilitator).
  M. A. Thornton, E.Durant, S. Conroy, J. Impagliazzo, A. McGettrick and T. Wilson, “Special Session: CE2004 Revisions (Computer Engineering Curriculum Guidelines) Special Session,” Frontiers in Education Conference (FIE), October 3-6, 2012.
  M. A. Thornton, S. Conroy, E. Durant, A. McGettrick, and T. Wilson, “Computer Engineering Review Task Force Report, Panel Presentation,” ACM SIGCSE Technical Symposium on Computer Science Education (SIGCSE), pp. 401-402, February 29-March 3, 2012 (panelist with J. Impagliazzo, moderator).
 

M. A. Thornton and T. Manikas,  “Axiomatic Analysis and Cyber Threat Tree Models for the Development of Large-Scale Disaster-Tolerant Information Security Systems,” Raytheon Information Systems and Computing Technology Network Symposium (ISaCTN), April 21, 2010.

Technical Reports

C. N. Frisbee, “An Overview of Placement and Routing Algorithms for PCB, VLSI, and MCM Designs with a Proposal for a New MCM Routing Algorithm,” Technical Report, Dept. of Computer Systems Engineering, University of Arkansas, Fayetteville, Arkansas, 1996 (directed by M. A. Thornton).
  M. A. Thornton and V. S. S. Nair, “Boolean Function Spectrum Computation Using a Structural Representation,” Technical Report, Southern Methodist University, CSE-9440, 1994.
  M. A. Thornton and V. S. S. Nair, “Applications and Efficient Computation of Spectral Coefficients for Digital Logic,” Technical Report, Southern Methodist University, CSE-9413, 1994.
  M. A. Thornton and V. S. S. Nair, “Reed-Muller Circuit Synthesis Using Numerical Methods,” Technical Report, Southern Methodist University, CSE-9319, 1993.
 

M. A. Thornton and V. S. S. Nair, “Iterative Combinational Logic Synthesis Techniques Using Spectral Data,” Technical Report, Southern Methodist University, CSE-9208, 1992.