Department of Computer Science and Engineering
Acting Chair and Professor
Cecil H. Green Chair of Engineering
Research Director, Darwin Deason Institute for Cyber Security
B.S.E.E., Oklahoma State University, 1985; M.S.E.E., University of Texas at Arlington, 1990; M.S.C.S. Southern Methodist Univeristy, 1993; Ph.D., Computer Engineering, Southern Methodist University
Reversible Logic Synthesis Based on Decision Diagram Variable Ordering, Journal of Multiple-Valued Logic and Soft Computing, (to appear, with D.Y. Feinstein).
To PE or not to PE ... The Sequel, IEEE Computing in Science and Engineering, IEEE Computer Society Press and American Institute of Physics, July/August 2010, vol. 12, no. 4, pp. 62-65, (with Steven F. Barrett).
Minimization of Quantum Multiple-Valued Decision Diagrams using Data Structure Metrics, Journal of Multiple-Valued Logic and Soft Computing, vol. 15, no. 4, pp. 361-377, (with D.Y. Feinstein and D.M. Miller).
A Redundant Signed Binary Addition Based Digital-to-Frequency Converter, IEE Electronics Letters, vol. 45, no. 2, pp. 824-826, July 2009, (with W. Chen and P. Gui).
A Discrete Logarithm Number System for Integer Arithmetic Modulo 2k: Algorithms and Lookup Structures, IEEE Transactions on Computers, vol. 58, no. 2, Feb. 2009, pp. 163-174, (with A. Fit-Florea, L. Li, and D.W. Matula).
A Methodology for Disaster Tolerance Utilizing the Concepts of Axiomatic Design, IIIS Journal of Systemics, Cybernetics and Informatics, vol. 6, no. 4, 2008, (with D. Easton, V.S.S. Nair, and S.A. Szygenda).
Components of Disaster Tolerant Computing: Analysis of Disaster Recovery, IT Application Downtime & Executve Visibility, International Journal of Business Information Systems,vol. 3, no. 3, 2008, pp. 317-331, (with C.M. Lawler, M.A. Harper, and S.A. Szygenda).
QMDD Minimization using Sifting for Variable Reordering, Journal of Multiple-Valued Logic and Soft Computing, vol. 13, no. 4-6, 2007, pp. 537-552, (with D.M. Miller and D.Y. Feinstein).
Integrated Design Validation: Combining Simulation and Formal Verification in Integrated Circuit Design, IIIS Journal of Systemics, Cybernetics and Informatics, vol. 4, no. 2, 2006, (with L. Li and S. Szygenda).
A Coarse-Grain Phased Logic CPU, IEEE Transactions on Computers, vol. 54, no. 7, July 2005, pp. 788-799, (with R. B. Reese and C. Traver).
Early Evaluation for Performance Enhancement in Phased Logic, IEEE Transactions on Computer Aided Design, (vol. 24, no. 4, pp. 532-550, April 2005, (with R. B. Reese, C. Traver, and D. Hemmendinger).
Additive Bit-serial Algorithm for the Discrete Logarithm Modulo 2k, IEE Electronics Letters, vol. 41, no. 2, pp. 57-59, January 2005, (with A. Fit-Florea and D.W. Matula).
Addition-based Exponentiation Modulo 2k, IEE Electronics Letters, vol. 41, no. 2, pp. 56-57, January 2005, ( with A. Fit-Florea and D.W. Matula).
Computation of Discrete Function Chrestenson Spectrum Using Cayley Color Graphs, Journal of Multiple-Valued Logic and Soft Computing, vol. 10, no. 2, 2004, pp. 189-202, (with D. Michael Miller).
Mitch Thornton is a professor at Southern Methodist University with appointments
in both the Computer Science and Engineering and the Electrical Engineering
Departments. His industrial experience includes employment at Amoco Research
Center, E-Systems, Inc (now L-3 Communications) and the Cyrix Corporation
where he held a variety of engineering and technical positions. He has published
more than 200 technical articles, 4 books, and is a named inventor on 2 US patents
and 3 patents pending. Mitch has consulted with and performed sponsored
research for a variety of government and industrial organizations including the
National Security Agency, Office of Naval Research, Army Research Laboratories,
National Science Foundation, Raytheon Intelligence and Information Systems,
Lockheed-Martin Aeronautics, Lockheed-Martin Missiles and Fire Control, Acxiom
Corporation, Silicon Space Technology, Revere Security, PayGo, and Eclipse
Electronics. His research interests include hardware security, quantum computing
system design, quantum and reversible logic, disaster and fault tolerance, formal
methods, electronic design automation, and emerging technology. Mitch was
designated a Gerald Ford Senior Research Fellow at SMU in 2005 and was the J.
Lindsey Embrey Trustee Associate Professor of Computer Science and
Engineering from 2004 through 2005. He received an Inventor Recognition award
from the Semiconductor Research Consortium in 2009 and a Citation of Honor
from the Institute of Electrical and Electronics Engineers in 2010. He is a Senior
Member of the IEEE and ACM professional societies and is a licensed professional
engineer in the states of Texas, Arkansas, and Mississippi. Mitch holds a PhD in
computer engineering from SMU, a MS in computer science from SMU, a MS in
electrical engineering from the University of Texas at Arlington, and a BS in
electrical engineering from Oklahoma State University.