Locking the Back Door: Protecting Test Circuitry from Attack

Attackers have focused on infiltrating computer systems through software for decades. However, there are many ways of compromising a system that don’t necessarily involve software at all—but instead involve the hardware. For example, today’s integrated circuits (ICs) contain a wealth of circuitry included specifically for configuration, test, debug, and diagnosis. Unfortunately, the goals of test are diametrically opposed to security goals, and over time this test circuitry has become a gaping back door for attackers. Providing access to unauthorized users is dangerous and can lead to the extraction of secret information, counterfeiting, and undesired modifications to a chip or circuit board. Working with engineers at ASSET InterTech, our researchers are developing low cost methods to protect test and configuration circuitry that is accessed with a test scan network conforming to the new IEEE 1687 standard. These methods allow sensitive circuitry and data to be hidden behind “locking segment insertion bits” (LSIBs). Trap bits, honeytraps, and switching LSIBs can provide additional protection.

In the next few minutes, we will briefly explore some hardware security issues and how they relate to on-chip test circuitry. Then we will show how an attacker without knowledge of the IEEE 1687 test scan network can use the test access port to find hidden information and test circuitry. Finally, we will explore how various configurations of locking SIBs can be used to make unauthorized access prohibitively expensive.

Jennifer Dworak

Jennifer L. Dworak is an assistant professor in the Department of Computer Science and Engineering at SMU. Her research, funded by the National Science Foundation and the Semiconductor Research Corporation, includes hardware security, manufacturing test, and the reliability of digital circuits and systems. Jennifer is a recipient of an NSF CAREER Award and a 2012 Ralph E. Powe Junior Faculty Enhancement Award funded by Oak Ridge Associated Universities. She is author on multiple technical articles, including papers that won a Best Paper Award from the VLSI Test Symposium and a TTTC Naveena Nagi Award. She has given 27 invited talks and been an invited panelist at technical meetings throughout the world.

Dr. Dworak earned her Ph.D., Master of Science, and Bachelor of Science in Electrical Engineering from Texas A&M University in College Station, Texas. To learn more about Dr. Dworak's research and get involved, contact her at jdworak@lyle.smu.edu.